AT45DB642D 64Mbit,DateFlash存儲器

64M bit, 2.7-Volt Dual-Interface Flash with two 1056-Byte SRAM

The AT45DB642D is a 2.7-volt, dual-interface sequential access Flash memory ideally suited for a wide variety of digital voice-, image-, program code- and data-storage applications. The AT45DB642D supports RapidS serial interface and Rapid8 8-bit interface. RapidS serial interface is SPI compatible for frequencies up to 66 MHz. The dual-interface allows a dedicated serial interface to be connected to a DSP and a dedicated 8-bit interface to be connected to a microcontroller or vice versa. However, the use of either interface is purely optional. Its 69,206,016 bits of memory are organized as 8,192 pages of 1,024 bytes (binary page size) or 1,056 bytes (standard DataFlash page size) each. In addition to the main memory, the AT45DB642D also contains two SRAM buffers of 1,024 (binary buffer size) bytes/1,056 bytes (standard DataFlash buffer size) each. The buffers allow receiving of data while a page in the main Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily handled with a self-contained three step read-modifywrite operation. Unlike conventional Flash memories that are accessed randomly with multipleaddress lines and a parallel interface, the DataFlash uses either a RapidS serial interface or a 8-bit Rapid8 interface to sequentially access its data. The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many commercial and industrial applications where high-density, low-pin count, low-voltage and low-power are essential. To allow for simple in-system reprogrammability, the AT45DB642D does not require high input voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for both the program and read operations. The AT45DB642D is enabled through the chip select pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output(SO), and the Serial Clock (SCK), or an 8-bit interface consisting of the input/output pins (I/O7 - I/O0) and the clock pin (CLK).All programming and erase cycles are self-timed.

AT45DB642D 特性

• Single 2.7V - 3.6V Supply
• Dual-interface Architecture
  – RapidS? Serial Interface: 66 MHz Maximum Clock Frequency
  SPI Compatible Modes 0 and 3
  – Rapid8? 8-bit Interface: 50 MHz Maximum Clock Frequency
• User Configurable Page Size
  – 1024 Bytes per Page
  – 1056 Bytes per Page
  – Page Size Can Be Factory Pre-configured for 1024 Bytes
• Page Program Operation
  – Intelligent Programming Operation
  – 8192 Pages (1024/1056 Bytes/Page) Main Memory
• Flexible Erase Options
  – Page Erase (1 Kbyte)
  – Block Erase (8 Kbytes)
  – Sector Erase (256 Kbytes)
  – Chip Erase (64 Mbits)
• Two SRAM Data Buffers (1024/1056 Bytes)
  – Allows Receiving of Data while Reprogramming the Flash Array
• Continuous Read Capability through Entire Array
  – Ideal for Code Shadowing Applications
• Low-power Dissipation
  – 10 mA Active Read Current Typical – Serial Interface
  – 10 mA Active Read Current Typical – 8-bit Interface
  – 25 μA Standby Current Typical
  – 9 μA Deep Power Down Typical
• Hardware and Software Data Protection Features
  – Individual Sector
• Permanent Sector Lockdown for Secure Code and Data Storage
  – Individual Sector
• Security: 128-byte Security Register
  – 64-byte User Programmable Space
  – Unique 64-byte Device Identifier
• JEDEC Standard Manufacturer and Device ID Read
• 100,000 Program/Erase Cycles Per Page Minimum
• Data Retention – 20 Years
• Green (Pb/Halide-free/RoHS Compliant) Packaging Options
• Temperature Range
• Industrial: -40° C to +85°C

AT45DB642D 訂購型號

AT45DB642D 技術支持：

1. ATMEL 愛特梅爾Flash 存儲器AT45DB642D 數據手冊DataSheet 下載. PDF（PDF 文件格式完整版）
2. 串行Flash 產品選型指南（ Excel 文檔格式）
3. ATMEL 愛特梅爾公司全線產品目錄. pdf
4. Programmer Support for Serial Flash Devices. pdf (Other, 8 pages, revision C, updated 4/08)
5. MicroLeadFrame Packages Pad Landing Recommendations (15 pages, revision B, updated 09/06). pdf
   This application note provides PCB designers with a set of guidelines for successful board mounting of Atmel's DataFlash memories housed in the MicroLeadFrame (MLF) package.
6. AN-4: Using Atmel's DataFlash (30 pages, updated 11/02) . pdf
   Atmel's DataFlash is a new Flash family designed specifically for data storage applications. This Application Note describes this family.
7. DataFlash Binary Page Size (2 pages, revision A, updated 5/08) . pdf
   Factory Configured DataFlash Binary Page Size options