AT89C5131A-L 帶有USB接口8位FLash單片機

AT89C5131A-L is a high-performance Flash version of the 80C51 single-chip 8-bit microcontrollers with full speed USB functions.

AT89C5131A-L retains the features of the Atmel 80C52 with extended Flash capacity (32-Kbyte), 256 bytes of internal RAM, a 4-level interrupt system, two 16-bit timer/counters (T0/T1), a full duplex enhanced UART (EUART) and an on-chip oscillator.

In addition, AT89C5131A-L has an on-chip expanded RAM of 1024 bytes (ERAM), a
dual- data pointer, a 16-bit up/down Timer (T2), a Programmable Counter Array (PCA), up to 4 programmable LED current sources, a programmable hardware watchdog and a power-on reset.

AT89C5131A-L has two software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial ports and the interrupt system are still operating. In the power-down mode the RAM is saved, the peripheral clock is frozen, but the device has full wake-up capability through USB events or external interrupts.

AT89C5131A-L 特性

• 80C52X2 Core (6 Clocks per Instruction)
  – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode
  – Dual Data Pointer
  – Full-duplex Enhanced UART (EUART)
  – Three 16-bit Timer/Counters: T0, T1 and T2
  – 256 Bytes of Scratchpad RAM
• 16/32-Kbyte On-chip Flash EEPROM In-System Programming through USB
  – Byte and Page (128 bytes) Erase and Write
  – 100k Write Cycles
  
• 3-KbyteFlash EEPROM for Bootloader
  – Byte and Page (128 bytes) Erase and Write
  – 100k Write Cycles
• 1-Kbyte EEPROM Data (
  – Byte and Page (128 bytes) Erase and Write
  – 100k Write Cycles
• On-chip Expanded RAM (ERAM): 1024 Bytes
• Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply
  
• USB 1.1 and 2.0 Full Speed Compliant Module with Interrupt on Transfer Completion
  – Endpoint 0 for Control Transfers: 32-byte FIFO
  – 6 Programmable Endpoints with In or Out Directions and with Bulk, Interrupt or
  Isochronous Transfers
• Endpoint 1, 2, 3: 32-byte FIFO
  
• Endpoint 4, 5: 2 x 64-byte FIFO with Double Buffering (Ping-pong Mode)
  
• Endpoint 6: 2 x 512-byte FIFO with Double Buffering (Ping-pong Mode)
  – Suspend/Resume Interrupts
  – Power-on Reset and USB Bus Reset
  – 48 MHz DPLL for Full-speed Bus Operation
  – USB Bus Disconnection on Microcontroller Request
• 5 Channels Programmable Counter Array (PCA) with 16-bit Counter, High-speed
  Output, Compare/Capture, PWM and Watchdog Timer Capabilities
  
• Programmable Hardware Watchdog Timer (One-time Enabled with Reset-out): 50 ms to 6s at 4 MHz
• Keyboard Interrupt Interface on Port P1 (8 Bits)
• TWI (Two Wire Interface) 400Kbit/s
  
• SPI Interface (Master/Slave Mode)
• 34 I/O Pins
  
• 4 Direct-drive LED Outputs with Programmable Current Sources: 2-6-10 mA Typical
• 4-level Priority Interrupt System (11 sources)
  
• Idle and Power-down Modes
  
• 0 to 32 MHz On-chip Oscillator with Analog PLL for 48 MHz Synthesis
  
• Industrial Temperature Range
  
• Low Voltage Range Supply: 2.7V to 3.6V (3.0V to 3.6V required for USB)
  
• Packages: SO28, PLCC52, VQFP64

AT89C5131A-L 訂購型號

AT89C5131A-L 技術支持

1. AT89C5131A-L 數據手冊DataSheet 下載. PDF
2. 80C51微控制器的復位輸入. PDF (編號: Tech 8051 00049)
3. 80C51在系統Flash編程. PDF (編號:8051 00050)
4. Device Programmers for 8051 Devices (Other, updated 09/07)
   This Excel spreadsheet provide summary information on device programmers supporting Atmel 8051 microcontrollers
5. Emulators for 80C51 Devices (Other, updated 11/03)
   This Excel spreadsheet provide summary information on emulation support for Atmel 80C51 microcontrollers
6. Package Adapters of 80C51 Devices (Other, updated 10/04)
   This Excel spreadsheet list available package adapters for Atmel 80C51 microcontrollers